Hsinchu, Taiwan – Taiwan Semiconductor Manufacturing Company (TSMC) has released an enhanced version of its 130nm process to enable improved power management.
The 130nm range now includes a slim standard cell, SRAM and I/O with substantial area reduction and uses LD-MOS on RF platforms to enable analog and power management applications. The ‘slim’ platform will be available in the third quarter this year and the LD-MOS on RF will ship in Q4.
“This is another example of how TSMC is committed to enabling more efficient SoC design of wireless, consumer and communications devices using 0.13-micron process technology,” said Dr. Simon Wang, senior director of Advanced Technology Business Division.
The ‘slim’ I/O area achieves a 30 percent size reduction and SRAM bit cells a 25 percent reduction when compared with traditional offerings and the 130nm LD-MOS devices will enable SOC designs with power management, says TSMC.
TSMC’s 130nm family now features 5V operation with copper interconnects for use in analog, high-speed DSP and class-D amplification.
