Intel and Numonyx say they’ve achieved a breakthrough in the research of phase change memory (PCM), a non-volatile memory technology bringing together the benefits of a range of different memory types.
Researchers have demonstrated a 64Mb test chip that enables the ability to stack, or place, multiple layers of PCM arrays within a single die. The companies say the findings pave the way for building memory devices with greater capacity, lower power consumption and optimal space savings for random access non-volatile memory and storage applications.
Numonyx and Intel researchers have now demonstrated a vertically integrated memory cell – called PCMS (phase change memory and switch). PCMS is comprised of one PCM element layered with a newly used Ovonic Threshold Switch (OTS) in a true cross point array. The ability to layer or stack arrays of PCMS provides the scalability to higher memory densities while maintaining the performance characteristics of PCM, a challenge that is becoming increasingly more difficult to maintain with traditional memory technologies.
“We continue to develop the technology pipeline for memories in order to advance the computing platform,” says Al Fazio, Intel Fellow and director, memory technology development. “We are encouraged by this research milestone and see future memory technologies, such as PCMS, as critical for extending the role of memory in computing solutions and in expanding the capabilities for performance and memory scaling.”
“The results are extremely promising,” adds Greg Atwood, senior technology fellow at Numonyx. “The results show the potential for higher density, scalable arrays and NAND-like usage models for PCM products in the future. This is important as traditional flash memory technologies face certain physical limits and reliability issues, yet demand for memory continues to rise in everything from mobile phones to data centers.”
Memory cells are built by stacking a storage element and a selector, with several cells creating memory arrays. Intel and Numonyx researchers were able to deploy a thin film, two-terminal OTS as the selector, matching the physical and electrical properties for PCM scaling. With the compatibility of thin-film PCMS, multiple layers of cross point memory arrays are now possible. Once integrated together and embedded in a true cross point array, layered arrays are combined with CMOS circuits for decoding, sensing and logic functions.
More information about the memory cell, cross point array, experiment and results will be published in a joint paper titled “A Stackable Cross Point Phase Change Memory,” to be presented at the 2009 International Electron Devices Meeting in Baltimore, Md., on Dec. 9.
