An international team of engineers has designed an “inexact” computer chip that attempts to challenge the industry’s 50-year pursuit of accuracy.
According to Krishna Palem of Rice University, the architecture significantly improves power and resource efficiency by allowing for occasional errors.
“In terms of speed, energy consumption and size, inexact computer chips like this prototype, are about 15 times more efficient than today’s microchips,” explained Palem.
“Our work since 2003 showed that significant gains were possible, and I am delighted that these working chips have met and even exceeded our expectations.”
As Palem notes, the concept is deceptively simple: Slash power use by allowing processing components – like hardware for adding and multiplying numbers – to make just a few mistakes. By managing the probability of errors and limiting which calculations produce errors, the engineers claim they can simultaneously cut energy demands while dramatically boosting performance.
One example of the inexact design approach is “pruning,” or trimming away some of the rarely used portions of digital circuits on a microchip. Another innovation, “confined voltage scaling,” trades some performance gains by taking advantage of improvements in processing speed to further cut power demands.
In initial simulated tests conducted in 2011, researchers demonstrated that pruning certain sections of traditionally designed microchips could boost performance in up to three ways: The pruned chips were twice as fast, used half as much energy and were half the size. In the new study, the team delved deeper and implemented their ideas in the processing elements on a prototype silicon chip.
“In our latest tests, we [demonstrated] that pruning could cut energy demands 3.5 times with chips that deviated from the correct value by an average of 0.25 percent,” said Avinash Lingamneni, a Rice graduate student.
“When we factored in size and speed gains, these chips were 7.5 times more efficient than regular chips. Chips that got wrong answers with a larger deviation of about 8 percent were up to 15 times more efficient.”
Project co-investigator Christian Enz of Switzerland’s Center for Electronics and Microtechnology (CSEM), added: “Particular types of applications can tolerate quite a bit of error. For example, the human eye has a built-in mechanism for error correction. We used inexact adders to process images and found that relative errors up to 0.54 percent were almost indiscernible, and relative errors as high as 7.5 percent still produced discernible images.”
The above-mentioned pruning technology is expected to find its way into application-specific processors, such as special-purpose “embedded” microchips like those used in hearing aids, cameras and other electronic devices.
It should also be noted that inexact hardware is a key component of the low-cost I-slate educational tablet designed by the Institute for Sustainable and Applied Infodynamics (ISAID), which is targeted at Indian classrooms with no electricity and few teachers. Officials in India’s Mahabubnagar District announced plans in March to adopt 50,000 I-slates into middle and high school classrooms over the next three years.
The hardware and graphic content for the I-slate are being developed in tandem. Pruned chips are expected to cut power requirements in half and allow the I-slate to run on solar power from small panels similar to those used on handheld calculators. The first I-slates and prototype hearing aids to contain pruned chips are are slated to launch in 2013.