New HyperTransport specification reveals updates for AMD’s 45 nm CPUs, Fusion’s secret

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New HyperTransport specification reveals updates for AMD's 45 nm CPUs, Fusion's secret

Chicago (IL) – As the release of AMD’s 45 nm processors Shanghai and, more importantly, Deneb is drawing closer, we are getting a better idea of what to expect from AMD’s next generation of CPUs. The HyperTransport Consortium just released details of the HyperTransport 3.1 specification, which increases the clock speed from 2.6 to 3.2 GHz (6.4 GTransfers/s).

Since the HyperTransport (HT) bus is 32-bit wide, the total aggregate bandwidth grows to a massive 51.6 GB/s (25.8 GB/s in both directions), which is a 10 GB/s improvement over the original 3.0 standard and a powerful tool to improve the performance of HT components such as chipsets and CPUs – including the upcoming Fusion processor.

It is widely expected that motherboard vendors will have no trouble adopting 3.1 support in 3.0-enabled chipsets. AMD’s existing 790FX and GX chipsets should support native bandwidth of HT 3.1 as soon as you pair them with a 45 nm CPU.

The HyperTransport Consortium also revealed the HTX3 specification, lifting the potential aggregate bandwidth of HTX cards to the level of HT3.1: 51.6 GB/s is an impressive number for an extension connector and we are hearing that the standard is already getting some attention in the field of  enterprise NAS-boxes with SSD technology.

Possibly most interesting, HT3.1 and HTX3 clear up some of the questions surrounding key features of AMD’s Fusion processor. Without doubt, HyperTransport 3.1 will be used as a communication interface between CPU and GPU and a bandwidth of 51.6 GB/s may open a whole new world of possibilities and an opportunity to be more competitive with Intel in terms of overall performance.

HyperTransport 3.1 will also be included with every Shanghai processor. According to our sources, the technology will be disabled and only HyperTransport 1.1 and 2.0 (up to 22.4 GB/s) will be supported.

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