Intel, HP unwrap Merced details

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Intel, HP unwrap Merced details

Calling it the most significant change to the Intel architecture since the 386, development partners Intel and Hewlett-Packard have unveiled new details of their 64-bit Merced chip.

Information on the next-generation CPU is now posted on the web for all to see at and at While the sites don’t divulge the chip’s projected clock speed when it ships in volume around the middle of next year, the companies report that Merced will perform more than 6 gigaflops – or 6 billion floating point operations per second. That’s roughly 3 times the performance of the Pentium III.

The Merced will contain more than 256 internal general-purpose registers, 128 floating point registers using 84-bit floating point numbers, parallel numeric processing, 64-bit memory addressing, MMX and SIMD extension support, and symmetrical multiprocessing capability.

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