GlobalFoundries kicks off 3D chip stacking at 20nm
GlobalFoundries has begun installing a special set of production tools to create Through-Silicon Vias (TSVs) in semiconductor wafers processed on the company's 20nm technology platform.
A GlobalFoundries spokesperson told TG Daily the new TSV capabilities will allow the fab to stack multiple chips on top of each other, an almost certain requirement for next-gen devices.
Essentially, vertical holes etched in silicon and filled with copper, TSVs enable communication between vertically stacked integrated circuits - allowing circuit designers to place stacks of memory chips on top of an application processor.
This chip architecture dramatically increases memory bandwidth while reducing power consumption, a key challenge for manufacturers of next-gen mobile devices such as smartphones and tablets.
"At leading-edge nodes, the adoption of 3D stacking of integrated circuits is increasingly being viewed as an alternative to traditional technology node scaling at the transistor level," the spokesperson explained.
"So we at GlobalFoundries are taking a different approach to packaging at leading-edge nodes, combining our advanced manufacturing capabilities with expertise from leading partners in the assembly and test ecosystem."
The new production tools are slated for installation in GloFo's new Fab 8 campus, which is currently focused on manufacturing at 32/28nm and below, with 20nm technology development well underway. The first full-flow silicon with TSVs is expected to kick off in Q3 2012.