IBM cools 3D chips with integrated water channels

Posted by Wolfgang Gruener

Zurich (Switzerland) – Why cool semiconductors with liquid on the surface when you can run water right through them? IBM believes that “tiny rivers of water” within stacked chips may not only advance Moore’s Law, but also pave the way to “green data centers”, significantly reducing the energy requirements by computers.

Researchers from IBM in Zurich and the Fraunhofer Institute in Berlin, Germany, have come up with a fascinating idea to cool down increasingly complex computer chips while reusing the generated heat for other applications. Instead of applying a traditional backside cooling technology, IBM thinks that channeling water right through stacked silicon will be the way to go.

Stacking silicon has been discussed as a future technology to come up with more efficient semiconductors – rather than positioning chips side-by-side, engineers are layering chips on top of each other. While this technique saves space and can increase interconnection speeds between different chips, such structures can have enormous heat dissipation, which is amplified, by different units that work in close proximity. According to IBM, such stacks or 3D chips can have an “aggregated heat dissipation of close to 1 kilowatt - 10 times greater than the heat generated by a hotplate - with an area of 4 square centimeters and a thickness of about 1 millimeter.”

 “As we package chips on top of each other to significantly speed a processor’s capability to process data, we have found that conventional coolers attached to the back of a chip don’t scale. In order to exploit the potential of high-performance 3D chip stacking, we need interlayer cooling,” said Thomas Brunschwiler, project leader at IBM’s Zurich Research Laboratory. “Until now, nobody has demonstrated viable solutions to this problem.”
 
IBM, however, believes it has now come up with a possible way to cool 3D chips. Brunschwiler and his team piped water into cooling structures as thin as a human hair - 50 microns - between the individual chip layers in order to remove heat efficiently at the source. The achieved cooling performance of this system was 180 watts/cm2 per layer for a stack with a typical footprint of 4 cm2.

According to IBM, each cooling layer measured only 100 microns in height and had 10,000 vertical interconnects. The complexity of this system becomes clear if you think about the fact that water cannot get into direct contact with the circuits. The research said that the structure was as complex as “a human brain, wherein millions of nerves and neurons for signal transmissions are intermixed but do not interfere with tens of thousands of blood vessels for cooling and energy supply, all within the same volume.”
 
Brunschwiler and his team are now working on even smaller versions of the technology and work on separate technologies for “hotspot cooling”.

Perhaps equally important as cooling a processor or chip system is research into reusing the heat generated by processors. Scientists have come up before with ideas to capture this energy and even convert it into electrical energy to power cooling devices. IBM now says that it is focusing on reusing heat generated by data centers by capturing water at its hottest and piping it into the building’s water and heating systems. At least in theory, there is a lot of unused energy that could be used for other purposes.