Rambus aims to offer PCIe Gen2 PHY solution on 65 nm with TSMC by mid-2007

Posted by From the Web

Conducting its own developer forum in Hsinchu on October 25, Rambus is using the event to promote its physical-layer (PHY) interface solution supporting the upcoming PCIe 2.0 (Gen2) specification. According to Rambus, it aims to offer the solution with guidelines for the 65 nm process at Taiwan Semiconductor Manufacturing Company (TSMC) by the middle of next year.

More here at DigiTimes.