Samsungs stacks DRAM to reach higher capacities |
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| Hardware | ||||
| By Wolfgang Gruener | ||||
| Monday, April 23, 2007 00:02 | ||||
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Seoul (Korea) – Stacking is the magic word that promises more capable and sometimes also faster multi-chip packages than what can be achieved today. Samsung claims to have developed a first “through silicon via” (TSV) DRAM stack that soon could deliver 4 GB memory modules for the mainstream market. Like Intel’s TSV technology and IBM’s recently announced TSV processor stacking idea, Samsung also cuts tiny holes into the chips that are filled with copper to create conducting “through silicon via”. In contrast to current common stacking technologies, TSV packages are typical thinner and have smaller footprints than current multi-chip packages that require wire-bonding between individual dies and have wires that extend horizontally beyond the dies.
![]() Samsung TSV DRAM Samsung said that on the inside of the DRAM WSP, the TSV is surrounded by an aluminum pad “to escape the performance-slow-down effect caused by the redistribution layer.” The company believes that the new technology will not only be capable of supporting upcoming DDR3 memory devices with faster speeds such as 1.6 Gb/s, but will be generally faster and consume less power than today’s multi-chip packages. The company did not say when the TSV WSP DRAMs may become available to consumers. DDR2 memory is already available in capacities of 4 and 8 GB, with street prices starting around $800 and $2200, respectively.
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Shop Keywords: Samsung, DRAM, stack, TSV, WSP