ffAustin (TX) - Semiconductor companies began making the switch from 200mm to 300m wafers in the early 2000s. The push is now on toward 450mm by 2012. The advantages of larger wafer diameters come from the fact that many wafer processing machines can only hold 25 wafers at a time. If a company can increase the number of dies created per wafer, without significantly altering the machine, then many more potential products can be created in the same amount of time, over twice as many. While that's all fine and dandy, and many companies are headed in that direction, AMD is looking for ways to extend the life of 300mm beyond 2012, and is hoping the industry will follow their lead.
AMD's Douglas Grose, senior VP of manufacturing, technology development and supply chain, will present the keynote address this morning at the 4th International SEMATECH Manufacturing Initiative (ISMI) Symposium. Grose will be presenting an alternative to the 450mm plan at the event. His vision includes extending the utilization of 300mm tools through something called "small lot manufacturing (SLM) and single wafer tools (SWT)". These will allow a more streamlined use of existing 300mm wafer products by introducing something akin to parallel procesing tools which remove the bottlenecks seen today. For example, certain machines can only process a few wafers, or even one, at a time out of the full 25 in each batch. This slows things down. By implementing SLM and SWT the idea is 300mm can remain effective before making the costly shift to 450mm.
AMD may be facing an up-hill battle with this decision however. Grose admits it requires an industry-wide change in thinking and that's not something which comes easily. This is especially true when companies like Intel have seen the significant advantages in moving from 200mm to 300mm wafers. That move resulted in approximately 2.25 times more dies per wafer. The move from 300mm to 450mm will yield approximately the same amount of increase. The word "approximate" is used here because silicon dies are rectangular, and based on their specific dimensions, an unused jagged edge is created around the circumference of a wafer as the many square pegs are placed into the big round hole. The larger the die size the more jagged and the larger percentage of the wafer is wasted. VIA's 31mm2 C7 CPU, and Intel's upcoming 45nm Silverthorne processors are examples of very small dies which yield a very high number of die candidates per wafer. Quad-core chips, on the other hand, are large and there are many fewer per wafer, making 300mm (and even 450mm) processing most desirable.
Read more ... AMD's press release.
AMD's Douglas Grose, senior VP of manufacturing, technology development and supply chain, will present the keynote address this morning at the 4th International SEMATECH Manufacturing Initiative (ISMI) Symposium. Grose will be presenting an alternative to the 450mm plan at the event. His vision includes extending the utilization of 300mm tools through something called "small lot manufacturing (SLM) and single wafer tools (SWT)". These will allow a more streamlined use of existing 300mm wafer products by introducing something akin to parallel procesing tools which remove the bottlenecks seen today. For example, certain machines can only process a few wafers, or even one, at a time out of the full 25 in each batch. This slows things down. By implementing SLM and SWT the idea is 300mm can remain effective before making the costly shift to 450mm.
AMD may be facing an up-hill battle with this decision however. Grose admits it requires an industry-wide change in thinking and that's not something which comes easily. This is especially true when companies like Intel have seen the significant advantages in moving from 200mm to 300mm wafers. That move resulted in approximately 2.25 times more dies per wafer. The move from 300mm to 450mm will yield approximately the same amount of increase. The word "approximate" is used here because silicon dies are rectangular, and based on their specific dimensions, an unused jagged edge is created around the circumference of a wafer as the many square pegs are placed into the big round hole. The larger the die size the more jagged and the larger percentage of the wafer is wasted. VIA's 31mm2 C7 CPU, and Intel's upcoming 45nm Silverthorne processors are examples of very small dies which yield a very high number of die candidates per wafer. Quad-core chips, on the other hand, are large and there are many fewer per wafer, making 300mm (and even 450mm) processing most desirable.
Read more ... AMD's press release.
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